Description: RTL Design Engineer - Senior Responsible for RTL design using Verilog HDL for ... for linting and simulation of design. Work with synthesis and backend ... Engineering KEY RESPONSIBILITIES: Perform RTL design of digital components in Verilog ...
13 hours ago
Description: Role: Design Verification Engineer Location: San Jose CA Job ... SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog ... Gate simulations and work with design engineers to verify fixes. Write diagnostics ...
20 hours ago
... Senior Power Supply Component Engineer Location San Jose, CA ... Title Senior Power Supply Component Engineer Relevant Experience (in Yrs ... of experience as power design engineer. o Design experience on the advanced ... cooling, GaN high density design etc. o It is ...
21 hours ago
... , ranking algorithms, and relevance tuning. Design, implement, and maintain search relevance ...
22 hours ago
... : Seeking an experienced professional to engineer robust web solutions with cross ... excellence throughout product lifecycle and design comprehensive backend infrastructure
15 hours ago