... looking for Senior Silicon Design Engineer for our client ... Job Title: Senior Silicon Design Engineer Job Location: Santa Clara ... engineer will work on high-speed multi-gigabit SerDes PHY designs ... control logic applications, automated design flows for clock tree ...
5 days ago
... looking for Senior RTL Design Engineer for our client in ... Job Title: Senior RTL Design Engineer Job Location: Santa Clara, ... .86hr Responsibilities:Perform RTL design of digital components in Verilog ... to improve/automate the design process.Preferred Experience: ...
18 days ago
... are looking for Senior RTL Design Engineer for our client in Santa ... , CA Job Title: Senior RTL Design Engineer Job Location: Santa Clara, CA ... of IP subsystems.Perform RTL design of digital components.Work with ...
20 days ago