Description:
The Role: Microarchitecture development of IP subsystemsPerform RTL design of digital components.Work with functional verification team to meet coverage and quality standards.Analyze/fix Lint and CDC errors of the components.Guarantee quality/timely deliverables meeting project s schedule.Help to improve/automate design process.Support post-silicon product bring-up/debug. Preferred Experience: 10 years' experience in RTL coding.Knowledge of PCIe Gen5 and PIPE specification.Knowledge of ASIC de
Apr 8, 2024;
from:
dice.com